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push new devices to the limit with comprehensive signal testing the a gilent 81200 data genera- tor/anal yzer platform is the right choice for you if you are an engineer in r&d or manufactur- ing performing functional and parametric t ests on digital subsyst ems, ics, or boards. the 81200 allows thor ough v erification and characterization of digital devices th roughout the dev elop- ment cycle, t hus reducing risks, costs and time-to-market. the 81200 is a modular system offering stimulus and anal yzer channels in speed classes 200/330/675/2.700mb/s. create virtually any test signal you need today's de vices require very complex stimuli. with sequencing and looping and up to 8 million vectors of memory per channel, you can create an inf inite variety of stimulus signals. choose from return-t o-zero (rz), non-return - to-zero (nrz) and return-to-one (r1) for mats. create even more complex signals with boolean channel addition including return-t o-com plement. the internal editor includes memory-based prbs/prws (pseudo-random binary/word sequence) to stimulate traff ic. the 81200 is ideal f or performing parallel bit error ratio measure- ments at up to 2.7gb/s or for stimulating the digital port of a dac . agilent 81200 the 81200 data generator/analyzer platform data sheet release 3.5 ( corresponds to sw release 3.5x) simplify your verification and characterization process key features figure 1: the 81200 data generator/analyzer platform ? flexible real-time stimulus and response system easy integration into st andard vxi envir onments 1kb/s to 2.7gb/s up to 8 mbit memory per channel 2-128 rz channels (doubles for nrz channels up to 200 mbit/s) scaleable and upg radeable through modules and fr ont- ends 1 ps timing resolution, 30 ps edge placement accuracy pattern formats: rz, r1, nrz, dnrz prbs (pseudo-random-bit- sequence) and prws (pseudo- random-wor d-sequence) up to 2 15 -1 sequencing with 5 looping lev- els (nested loops) branching on internal and external ev ents variable dela ys, lev els and transition times can be set independently for each channel semi-automatic deskew eases test setup measurement modes: capture, error capture, error count measurement result displays: state list, waveform viewer, bit-error-rate intuitive, windows nt ? 4.0?based gui remote inter faces: lan, gpib scpi,with based language, plug & play drivers for easy pro- gramming in a gilent vee, c/c++/visual basic.
2 figure 2: block diagram of 81200 functional layout the a gilent 81200 data generator/anal yzer platform is a modular platform which can be tailored to your specific needs, for example, as a pulse generator, single or multi-phase clock generator, a data generator, or as a data generat or/anal yzer system. as indicated in the block diagram (figure 2), each dut input pin is stimulated by a generator channel with independent data memory, timing and output. the de vice outputs are sam pled by an ana- lyzer channel with individual input t hreshold, sampling point delay, and memory, for captured and expected data. all data gen- erator and analyzer channels are synchr onized by a common sys- tem clock and pattern sequence. initial set up is easy because the 81200 is supplied ready- to-use. all software and hardware is fully inst alled. y ou only need to connect comput er peripherals (keyboard, mouse, and monitor) to the mainframe. easy integration into your test environment the 81200 dat a generat or/analyz- er modules can be integrated easily into ot her vxi-based test platfor ms, and c-size vxi module can be configured to work with the 81200 system. plug & play driv ers facilitate easy program- ming and t est system integ ration. for details of integ rating the 81200 modules into a st andard vxi t est system, consult the 81200 data generat or/analyzer platform conf iguration guide, publication number 5965-3417e. if the integration into a st andard vxi t est system is not required, please refer to the mainframes described in the next section for conf igurating a standalone system of the 81200. the advantage of a standalone system is t hat the system arrives fully inst alled and ready to go. comprehensive characterization charact erizing digital com ponents is usually a very time-consuming task. to make t his t ask faster and easier with the 81200, con- sider the wide range of acces- sories for the a gilent 81200, which include: e4839a t est f ixture (see 5968- 3580e for more det ails) e4805b opt 002 8 line trigger input for ttl signals (useful when branching on external events (hardware signals) other then vxi-ecl trigger lines or compare err ors) e4805b opt 003 de-skew probe (comprises a gilent 1144a 880mhz active probe and a bnc (f) to sma (m) adapter (part number 1250- 1200)). agilent general accessories (cable kits, adapt ers et c). see table 1. product description model number general accessories cable kit sma (m) to sma (m), matched pair agilent 15443a cable kit: 4*sma(m) to sma(m) 1 meter agilent 15442a cable kit: 10*sma(m) to sci connector agilent 15441a sma coax. cable, 1 m. agilent 8120-4948 torque wrench, sma. agilent 8710-1582 adapter kit: 4* sma(m) i/o adapter agilent 15440a adapter sma (m)/bnc (f). agilent 1250-1200 adapter right-angle sma (m-f). agilent 1250-1249 adapter right-angle sma (m-m). agilent 1250-1397 adapter tee sma. agilent 1250-1698 pulse adder/splitter, sma. agilent 11667b 500 ps transition converter. agilent 15433b 1 ns transition converter. agilent 15434b 2 ns transition converter. agilent 15438b cable, gpib. agilent 10833b clock generation, central start / stop sequence se q uenc e cloc k external clock , e x t . start / sto p , e x t . pll referenc e se q uenc e cloc k state li st bit error rat e data anal y ze r ca p ture d data timin g, de m u x ex p ecte d data g enerator data timin g , mu x d ut data generato r platform description
3 figure 4: e4949c mainframe e4849c mainframe the mainframe (figure 4) offers eleven to twelve slots for the 81200 modules, depending on the contr oller option which is chosen. contr oller options are a 2-slot vxi pc (e4803a), or an ieee 1394 pc link to vxi (1 slot) to control the system from an external pc. (e4849c#013) it offers 11 empty slots for e.g 1 clock module and up to 10 data modules. when the 2-slot pc is chosen the system comes inst alled with the windows nt? operating system and the e4873a user sof tware. if the contr oller option, ieee 1394.pc link (f irewire) is cho- sen, e4849c#013 should be select ed. there is an external pc offered, preinst alled with windows nt and 81200 sw (e4860as#014) this conf igura- tion offers 12 empty slots for 81200 modules. figure 3: front-ends, modules and mainframe. front-ends determine -type (generator/ana- lyzer) -speed of channels data modules determine -signal generation/analysis capabilities-speed of channels clock module generates the system clock and distributes the clock to data modules scaleable and upgradeable the 81200 is a modular instru- ment, which can be t ailored to your specific needs. the idea is that you get a system which is conf igured in such a way that matches y our measurement task perfectly . the front-ends det ermine the speed and in put/output capabili- ties of your instrument. after you have chosen the front- ends, they are placed in data modules, which are responsible for sequencing, generation and analy- sis of data patterns. these mod- ules plus at least one clock mod- ule, which generates the system frequency of the instrument, are inst alled in the mainframe (see figure 3). if more channels are needed you can add up to two expander frames to the system, to reach the maximum number of channels (64 channels at 2.7 gb/s, 128 channels at 675 mhz, or 256 channels at 200/330 mb/s). for more modules one or two expansion frames (e4860a#152) can be added to house 22/23 data modules. e4849c#002 option 002 pro vides a vxi extender module (e1482b) so that one or two expander frames (e4848b) can be con- nect ed, in order for a total of 31 data modules to be housed.
4 table 2 : module/front-end compatibility modules 330 mb/s 675mb/s 2.7 gb/s front-ends e4841a e4832a e4861a e4835a x e4838a x e4846a x e4847a x e4862a x e4863a x each system needs at least one clock module ( e4805b) to gener- ate the system clock and, at least one dat a generat or/anal yzer module e4841a, e4861a or e4832a. e4805b central clock module this module provides clock and sequence data flow control sig- nals to the data modules: frequency resolution of 1 hz (inst ead of f our digits) synchr onizes analyzer channels as well as generat or channels drives up to 11 e4841a, e4832a and e4861a modules. e4841a 333mb/s data generator/analyzer module this module pro vides f our slots for any mix of generator or ana- lyzer dual front-ends e4846a or e4847a. with the dual frontends the mod- ule can pro vide 8 independant channels at 5 mbit memory each. e4832a 675 mhz data generator/analyzer module this module pro vides f our slots for any mix of generator or ana- lyzer front- ends, e4838a,e4835a. this module allows 4 independant channles with prbs/prws mea- surements up to 2 15 -1 and has a memory depth of up to 2 mbit per channel. e4861a 2.7 gb/s data generator/analyzer module this module provides two slots for any mix of generator and anal yzer fr ont-ends e4862a, e4863a. the module provides two independant channels. generator front-ends e4862a 2.7 gb/s, data or 2.7ghz clock single channel, diff erential, 1.8 vpp. e4838a 675 mhz, rz/nrz, single channel, differential, variable transition times, 3.5 vpp. e4846a 200 mbit/s, nrz, dual channel, single ended, 3.5 vpp. analyzer front-ends e4863a 2.7 gsa/s, single channel, 50 w e4835a 675 msa/s, this is a pair of channels, 50 w 1 ghz bandwidth. it fills two adjacent slots of the e4832a and provides two inde- pendant channels. e4847a 333 msa/s, dual channel, 50 ohm/high-impedance select able, 350 mhz bandwidth. for mixed-logic requirements, you can mix slower and faster fr ont- ends to pro vide an economic way of generatating control signals as well as data. front-end and module overview
5 these specifications describe the instr ument?s warranted performance. n on-warranted values are described as typical. all specif ications are valid from 10o c to 40o c ambient tem pera- ture after a 30 minute warm up phase, with outputs and inputs at ecl leves terminated with 50 w to ground. channels and grouping number of channels: up to 64, 128 or 256 channels depending on the front-end type. grouping: connections can be grouped and named accor ding to the requirements of the device- under- t est to facilitate setup. port types: individual channels can be assigned as data or pulse ports. pulse ports are indepen- dent of the data sequence. easy setup of a clock is possible pattern and sequencing segment: the memory can be divided into loopable segments. segment types : pattern, pause, prbs/prws*. pause segments: ?pause 0? or ?pause?1? levels select able for generator. pa use segment for analyzer. pattern formats: nrz, dnrz, rz, and r1 patterns can be selected, as shown in figure 10. powerful sequencing: a sequence is a succession of segments, as shown in figure 7. the segment flow is defined by -loops (f inite, infite,nest ed) and ev ents (branch, goto, trigger). a sequence applies to all channels, but diff erent seg- ment types can be set in differ- ent modules. note: generating the segment types prbs and pattern (user- defined) at t he same time requires two different e4841a data generat or/anal yzer modules. one module gen erates t he prbs pattern, the ot her one the user- defined pattern. figure 5: the connection window helps you to create a virtual model of your measurement set-up figure 6: the sequence editor lets you set up data segments, different looping levels, and events figure 7: sequencing capabilities to facilitate com plete pattern setup there are diff erent editing tools: sequence editor: (def ines sequence) data editing: (def ines segment con- tent) f ill in the pattern, complement, copy, cut, paste, move, insert, append, delete. binary, oct al, hexadecimal, and decimal form ats. masking: single bits or com plete segments can be masked in the expected data memory. this allows specific areas to be ignored in the co mpare data mode. technical specifications data flow with nested loops data flow with event handling 100 infinite 100 event event block d block c block b block a block a block b block c
6 front-ends: you can choose betw een t hree generator fr ont- ends (outputs) and three anal yzer front-ends (in puts) of the speed classes 334 mhz, 675 mhz, and 2.7 ghz. for individual specifi- cations see the f ollo wing pages. enable/connect: each output/input can be switched on and off individually, and the connect/ disconnect function allows you to disable/enable respectively, all outputs and in puts at one time. connectors: sma (f) 3.5 mm. figure 8a: channel addition input/output specifications channel addition (for the e4832a with e4838a only) outputs can be logically com- bined, as shown in figure 8. this feature is useful in applications such as: clock/data recovery tests that need different pulse widths in a single channel return to com plement logic. with the analog channel adding a 4 -lev el- signal is possible, see fig 9b. auxiliary output: the anal yzer front-end e4863 provides an aux- ilary output. a diff erential signal from the device-under- t est can be fed sing le-endedthrough the ana- lyzer for further usage, e.g. as an input to a jitter anal yzer or an oscilloscope. a uxiliary output works in all in put modes. figure 8: 81200 pattern formats rz signal normal yellow complement green nrz signal from waveform memory added signal normal red complement blue hil hil lol lol lo2 lol+lo2-hil fig 9a: analog channel add setupthe e4838a fig 9b : analog channel add agilent e4838a frontend
7 measurement modes the a gilent 81200 data generat or/ analyzer platform provides measurement modes when: one or more analyzer fr ont- ends are fitted the e4805b provides the clock (or conditions it in the case of an external clock). the measurement modes are detailed below. capture mode : data bits are sam- pled and stored. results can be displayed in a state list or viewed using the waveform view- er. captured data can be edited, filed, export ed, or copied to the generator channels for regeneration. error capture mode: data bits are sampled and com pared with an expected pattern in real time. a total of at least 65,504 bytes can be captured bef ore or after an error occurs. masking is possible for individual bits in pattern seg- ments and whole segments, so that only the bits of int erest are captured. the results are st ored and can be viewed using the state list or waveform viewer. errors are highlighted. error count mode: the same as error capture mode, except that the errors are counted instead of being st ored. it is possible to watch the result display in real time while the measurement is running and stimulus parameters can be varied. the result is dis- played as a bit count (number of bits), an error count (number of errors), or as a bit-error-rate (ber). figure 10: the bit-error-rate display shows the actual error rate in real-time. figure 11: waveform view the waveform viewer the waveform viewer can display the anal yzer data in a graphical way.
8 the f ollo wing waveforms are taken from the different speed classes of the 81200 family. the pictures are taken sho wing once the generator output on the scope and second the anal yzer inputs are connected to an ideal- source and with help of the eye opening measurement ( p arbert 81250 measurement sof tware) the performance of the anal yzer is recor ded . parbert settings: generator and analyzer in single ended mode, normal in/out used. frequency : 625 mb/s used f or: e4805a+e4832a + e4838a + e4835a 2.5gb/s used for: e4805a+ e4861a + e4862a +e4863a data :prbs 2 15 -1 (stimulus and expect ed) data generator levels : low level -.4v, h igh levels + .4v analyzer/ eye opening: single ended, terminated to grd. compared bits 10 6 ber threshold 10 -3 trigger out : clock mode (625 mhz), levels o/1v scope settings: agilent 81600 dca with 83484a 50 ghz module -connected with 1m sma cables -ext trigger from 81200 trigger out -signal adjusted with auto scale - every measurement for 300 events ideal source: transistion time 30ps, jitter <10ps pp, levels -.5v/ figure 12 a) b): signals of e4832a with e4838a generator + e4835a analyzer figure 13a) b): signal of e4861a with e4862a and e4863a analyzer signal waveforms
9 e4861a generator / analyzer module this module holds any combination of up to two anal yzer front-end (e4863a and generator fr ont-end e4862a,). clock module/data mode the generator can operate in clock mode or data mode. clock mode is achieved when the generator is assigned as a pulse port. data mode is achieved when using it as data port. in clock mode there is a fixed duty cycle of 50%. in data mode t here is nrz format with variable delay. the anal yzer works as data port always with variable sam pling delay. the sam pling delay of the anal yzer consists of two elements: the start delay and the f ine delay. the f ine delay can be varied with- in 1 period wit hout st opping. data capabilities prbs/prws and memory based data are def ined by segments. segments are assigned to a gener- ator for a stimulating pattern, on an analyzer it defines the expected pattern where the incoming data are compared to. the expected pattern can be setup with mask bits. the segment length resolution is the resolution to which the length of a pattern segment or mask can be set. the maximum memory per channel of the e4861a can be set in steps of 64 bits up to a length of 8192 kbits. if the 64 bit seg- ment length resolution is too coarse, memory depth and fre- quency can be traded as shown in table 6. figure 14: e4861a module technical specifications 2.7gb/s e4861a generator/analyzer 2.7gb/s module 2 slots for the front-ends e4862a, e4863a table 3: e4861a data generator timing specifications (@ 50 % of amplitude, 50 ohm to gnd frequency range* clock/data mode 333.334 mhz/mb/s to 2.70 ghz delay (between can be specified as leading edge delay in channels) fraction of bits in each channel range 0 to 300 ns (not limited by period) resolution 1 ps accuracy \ 50 ps \ 50 ppm relative to the zero-delay placement. (from 20c to 35c without autocal) \ 30 ps \ 50 ppm typ. relative to the zero- delay placement and temperature change within \ 5 c after autocalibration skew between modules of same 50 ps typ. after deskewing at customer type levels and unchanged system frequency pulse width 50% of period typ. in clock mode *see tables for frontend deratings table 4: e4861a analyzer timing all timing parameters are mea- sured at ecl and levels, terminated with 50 w w to gnd sample delay:= start delay + fine delay, fine delay can be change without stopping sampling rate* same as generator fine delay range \ 1 period sampling delay range same as generator sampling delay range same as generator accuracy same as generator resolution same as generator skew same as generator *see tables for frontend deratings
10 sub-frequencies for applications requiring different frequencies at a frac- tion of the system clock, the rate can be divided or multi- plied by 1, 2 or 4. this influ- ences the dependency between segment length resolution and maximum memory depth (see table 6). table 5: e4861a pattern and sequencing patterns: memory based up to 8mbit see table 17 prbs/prws 2 n -1, n=7, 9, 10, 11, 15 marker density 1/8, 1/4, 1/2, 3/4, 7/8 at prbs/prws 2 n -1, n=7, 9, 10, 11,15 errored 2 n -1, n=7, 9, 10, 11, 15 extended ones or 0 2 n -1, n=7, 9, 10, 11, 15 clock patterns divide or multiplied by 2, 4, 8, 16 user data editor, file import table 7: parameters for analyzer front-ends e4863a 2.7 gsa/s number of channels 1 , differential or single ended impedance 50 ohm typ. 100 ohm differential if termination voltage is switched off internal termination voltage -2.0 to +3.0 v (can be switched of ) threshold voltage range -2.0 to + 3.0 v threshold resolution 2 mv threshold accuracy 1% 20 mv input sensitivity (single-ended 50mv typ and differential) minimum detectable 180 ps typ. at ecl levels pulse width maximum input voltage range three ranges selectable: -2v to + 1v -1v to +2v 0v to 3v maximum differential voltage 1.8v operating max. 3v phase margin, with ideal input signal >1ui - 50 ps with generator e4862a > 1ui-75 ps auxiliary out swing: 400 mv pp typ., ac coupled table 6: data rate range, segment length resolution, available memory and fine delay operation data rate range segment length maximum memory mbit/s resolution depth, bits 333.334...666.666 16 bits 2,097,152 666.667...1,333.333 32 bits 4,194,304 1,333.334...2,666.667 64 bits 8,388,608 in general it is possible to set higher values for the segment length resolution and also at lower frequencies than is indicated in the table
11 table 8: parameters for generator front-ends e4862a 2.67gbit/s (e4864a 1.33 ghz) outputs 1, differential or single ended impedance 50 ohm typ. formats clock: duty cycle 50%10% typ. data: nrz, dnrz output voltage window -2.00 to + 3.00 v 3.00 v to 4.5(terminated to +3v only) maximum external voltage - 2.2 to +4.7 v external termination voltage -2v to +3v amplitude / resolution low voltage cmos 0.05 to 1.8 vpp* / 10 mv accuracy hilevel/amplitude 2%10 mv short circuit current 72 ma max transition times (20%-80%) 90ps typ@ ecl,lvds 110ps typ @ vpp max overshooting/ringing 20% + 20mv typ jitter, data mode <50ps peak-to-peak clock mode <5ps, rms *does double into open, but outputs may switch off. generator output the generator output can be used single ended or diff erential. enable/disable relays provide on/off swit ching. swit ched off will provide inter nal ter mination. it is recommended eit her to turn off or externally terminate unused outputs. the generator outputs can work into 50 ohm centre tapped ter- mination or 100 ohm diff erential termination. the proper ter mina- tion scheme can be chosen from the editor to adapt pr oper level programming. protection input and output relays switch off automatically, when maximum voltages will be ex ceeded. compatibility the e4861a module will work also with front-ends e4864a and e4865a up to 1. 35gb/s. input/output addressable technologies lvds, ecl (terminated with 50 to 0 v/-2 v), pecl (terminated to +3 v anal yzer in put requires use of a bias tee) analyzer input the anal yzer channel can be operated -single ended normal -single ended com plement -diff erential for termination t here is always 50 ohm connected to a program- mable ter mination volt age. in dif- ferential mode there is addition- ally a 100 ohm diff erential termi- nation selectable. independantly of the selected termination, one can select if the anaylsis of the incoming signal shall be per- formed on the input, inverted input or true differentially. for connecting to pecl it is recom- mended to use a bias t ee. the 2.7 gb/s analyzer offers an auxil- lary output, where the diff erential input signal is available as a sin- gle ended signal. the bandwidth of the aux output is limited to 2ghz.
12 4 slots for the front-ends e4835a*, e4838a and e4843a note:*occupy two front-end slots of the e4832a e4832a generator/analyzer 675 mhz module figure 15: e4832a module **conditions: frequency > 20.8 mhz and by using the finest seg- ment length resolution. technical specifications 675 mhz e4832a 675 mhz generator/analyzer module this module holds any combination of up to two anal yzer front-ends (e4835a) and four generator front-ends (e4838a), clock module/data mode the generator can operate in clock mode or data mode. clock mode is achieved when the generator is assigned as a pulse part. data mode is achieved with assigning it and data part. in clock mode there is a fixed duty cycle of type 50%. in data mode t here are nrz,rz,r1 for mats wit h variable delay. the analyzer works as data part always with variable sam- pling delay. the sam pling delay consists of two elements: the start delay and the f ine delay. the fine delay can be varied wit hin 1 period wit hout st opping. data capabilities prbs/prws and memory based data are def ined by segments. segments are assigned to a gener- ator for a stimulating pattern, on an analyzer it defines the expected pattern where the incoming data are compared to. the expected pattern can be setup wi th mask bits. the segment length resolution is the resolution to which the length of a pattern segment can be set. the maximum memory per chan- nel of the e4832a can be set in steps of 16 bits up to a length of 2048 kbit. if the 16-bit segment length resolution is too coa rse, memory depth and frequency can be traded as shown in t able 12. sub-frequencies: for applications requiring different frequencies at a fraction of the system clock, the ratio can be divided or multiplied by 2,4,8, or 16. this inf luences the depen- dency between segment length res- olution and maximum memory depth (see t able 12). table 9: e4832a data generator timing specifications (at 50% of amplitude, 50 ohm to gnd and fastest transition times) frequency range 333.334 khz to 675 mhz delay range 0 to 3.0 3 s (not limited by period) resolution 2 ps accuracy \ 50 ps \ 50 ppm relative to the zero-delay placement*. skew 50 ps typ. after deskewing at customer levels pulse width can be specified as width or % of duty cycle range 750ps to (period-750ps) resolution 2ps accuracy \ 200 ps \ 0.1 % duty cycle 1% to 99%, subject to width limits *valid at 15...35c room temperature table 10: e4832a analyzer timing all timing parameters are measured at elc and levels, terminated with 50 w w to gnd sample delay:= start delay + fine delay, fine delay can be changed without stopping** sampling rate* same as generator fine delay range \ 1 period sampling delay range same as generator accuracy same as generator resolution same as generator skew same as generator *see tables for frontend deratings
13 1 occupy two front-end slots of the e4832a. the e4835a contains two front-ends (e4835az) and one common data back end. in this document we refer to one front-end as e4835a. input/output addressable technologies lvds, (p)ecl, ttl, 3.3 v cmos analyzer input the analyzer channel can be operated -single ended normal -single ended com plement -diff erential for termination t here is always 50 ohm connected to a programmable termi- nation volt age. in differen- tial mode there is addi- tionally a 100 ohm differ- ential term ination selec- table. independantly of the selected ter mination, one can select if the ana ylsis of the incoming signal shall be performed on the input or inverted input or true differentially. generator output the generator output can be used single ended or differential. enable/disable realys pro vide on/off swit ching. swit ched off will provide inter nal ter mina- tion. it is recommended either to turn off or exter- nally terminate unused outputs. the generat or outputs can work into 50 ohm centre tapped termination or 100 ohm diff erential ter mina- tion. the proper ter mina- tion scheme can be chosen from the editor to adapt proper lev el programming. compatibility the e4832a module can also be equipped with e4843a generator fr ont- end. table 11: pattern and sequencing features of e4832a patterns: memory based up to 2mbit see table 24 prbs/prws 2 n -1, n=7, 9, 10, 11, 15, marker density 1/8, 1/4, 1/2, 3/4, 7/8 at prbs/prws 2 n -1, n=7, 9, 10, 11, 15 errored 2 n -1, n=7, 9, 10, 11, 15 extended ones or 0 2 n -1, n=7, 9, 10, 11, 15 clock patterns divide or multiplied by 2, 4, 8, 16 user data editor, file import table 12: data rate range, segment length resolution, available memory and fine delay operation data rate range segment length maximum memory mbit/s resolution depth, bits 20.834...41.666 1 bits 131,008 41.667...83.333 2 bits 262,016 83.334...166.666 4 bits 524,032 166.667...333.333 8 bits 1,048,064 333.334...666.667 16 bits 2,097,152 in general it is possible to set higher values for the segment length resolu- tion and also at lower frequencies than is indicated in the table. in this case the fine delay function and the auto-sychronisation function are unavailable. table 13: level parameters for differential generator front-end e4838a 667 mhz number of channels 1, differential impedance 50 ohm typ. data formats rz, r1, nrz, dnrz output voltage window -2.2 to +4.4 v (doubles into open up to max. 5vpp) amplitude /resolution 0.1v to 3.50 v/ 10mv level accuracy \ 3 % \ 25mv typ. after 5 ns settling time at lvds/(p)ecl \ 1% \ 25 mv typ. after 5 ns settling time variable transition time range (10-90% of amplitude) 0.5 to 4.5 ns accuracy \ 5% \ 100 ps at lvds /(p)ecl (20-80% of amplitude) 0.35 ns typ overshoot/ringing | 7% ( | 5% typ). jitter data mode | 100 ps peak to peak (80 ps typ) clock mode 8ps rms typ. channel addition xor and analog table 14: two differential analyzer front-ends e4835a 1 , 667 msa/s number of channels 2, differential or single ended (switchable) impedance 50 ohm typ. 100 ohm differential if termination voltage is switched off termination voltage (can be switched off) -2.0 to + 3.0 v threshold voltage range/threshold accuracy -2.00 to +4.50 v/ \ 1% \ 20mv threshold resolution 2mv input sensitivity differential 50 mv typ single-ended 100 mv typ minimum detectable pulsewidth 400 ps typ. at ecl levels input voltage range two ranges selectable: 0 to +5 v and -2 to +3 v phase margin, with ideal input signal } 1ui - 100 ps with e4838a generator } 1ui -180 ps
14 e4841a 333 mb/s generator/analyzer module this module holds any combination of up to f our anal yzer fr ont-ends (e4847a) and generator front-ends (e4846a). these dual channel front-ends make two channels out of each slot, so eight chan- nels per module. the e4841a is orignally a 667 mhz module, with the use of the dual fron- tends t he maximum data rate is limited to 333 mb /s. for 675 mb/s operation t he e4832a is recommended. segment length resolution: this is the resolution to which the length of a pattern segment can be set. the maximum memory per channel of the e4841a can be set in steps of 8 bits up to a length of 512 kbit. if the 8-bit segment length resolution is too coa rse, memory depth and frequency can be traded as shown in table 18. sub-frequencies: for applications requiring different frequencies at a frac- tion of the system clock, the ratio can be divided or multi- plied by 2,4,8. this inf luences the dependency betw een seg- ment length resolution and maximum memory depth (see table 18). using the anal yzer, in error capture mode the memory is half of the value shown. (t able 18) f r o nt-end 1 f r o nt-end 2 f r o nt-end 3 f r o nt-end 4 bus vxi hp e4 8 41 a s y s c lk i n a cc e ss f a ile d gen. / analyze r 66 7 mhz dat a table 16: e4841a analyzer timing all timing parameters are measured at ecl and levels, terminated with 50 w w to gnd sampling rate* same as generator sampling delay range* same as generator limited to 1 system period within one front-end. accuracy same as generator resolution same as generator skew* same as generator *see tables for front-end deratings 4 slots for the front- ends e4846a and e4847a e4841a generator/analyzer 667 mhz module table 15: e4841a data generator timing specifications (@ 50 % of amplitude, 50 ohm to gnd and fastest transition times) frequency range* 1.000 khz to 333.333 mhz delay range 0 to 3.0 s (not limited by period). for f<333.334 khz" max. delay is 1 period. resolution 2 ps. for f<170 khz 0.05% of period accuracy 50 ps 100 ppm relative to the zero delay placement. for f<170 khz the tolerance increases to +/- 0.1% skew 50 ps typ. after deskewing at customer levels pulse width can be specified as width or % of duty cycle range* 750ps to [period-750ps] resolution 2 ps accuracy* 200 ps 0.1 % duty cycle 1 % to 99 %, subject to width limits * see tables for front-end deratings figure 16 technical specifications 333mb/s
15 input/output addressable technolgies ttl, 3.3v cmos, (p)ecl analyzer output -sing le-ended -50 ohm -high im pedence (10k) the sampling point of the dual channel anal yzer in put can be indi- vidually adjusted within one system period. generator output -single ended outputs -enable/disable realais the delay range of the two chan- nels wit hin one front-end can be sued over the full range. the output can be use into 50 ohm or open. into open the volt age range doubles compatibilty the e4841a can be used with e4843a, e4844a, e4837a, fr ont- ends up to 667mhz with up to 1 meg of memory. i/o pin stimulation/measurement the e4847a high-impedance anal yzer front-end assists measurements on bidirectional por ts. in parallel with a generator fr ont-end, the im pedance presented to the pin is 50 w . a sma tee connector 15440a (4 parts) is required. table 17: pattern and sequencing features of e4841a patterns: memory based up to (1 mbit) see table 23 prbs/prws 2 n -1,n=7,9,10,11,15 clock patterns divide or multiple by 2,4,8, (16) user data editor, file import table 18: data rate range, segment length resolution, available memory for synchronisation and fine delay operation data rate range segment length maximum memory mbit/s resolution depth, bits 20.834...41.666 1 bits 65,504 41.667...83.333 2 bits 131,008 83.334...166.666 4 bits 262,016 166.667...333.333 8 bits 524,032 in general it is possible to set higher values for the segment length resolution at a lower frequency than is indicated in the table table 19: level parameters for dual generator front-end e4846a 200 mbit/s e4846a outputs/source resistance 2, single-ended 50 ohm maximum frequency 200 mbit/s (and data formats) (nrz, dnrz) output voltage window -1.75 to +3.50 v doubles into open addressable technologies ttl, ecl (terminated with 50 w to 0 v/-2 v), pecl (terminated to +3 v) amplitude/resolution 0.30 to 3.50 vpp/10mv doubles into open accuracy levels : \ 5% \ 100 mv short circuit current + 70ma max., -35 ma max. maximum external voltage -2 to +5 v and termination voltage range transition times constant slew rate 20-80% at elc levels | 1.2 ns, 700 ps typ. 10-90% at 2.5 vpp ampl | 2.5 ns, 1.8 ns typ. overshoot/ringing | 5% + 120 mv droop 2.5 vpp | 20%, ecl | 10% minimum pulsewidth elc: | 1.5 ns, 1 ns typ. 2.5 vpp: | 4.0 ns, 3 ns typ table 20: parameters for analyzer front-end e4847a 333 msa/s, dual channel analog bandwidth 350 mhz typ. number of channels 2 independent levels typical impedance 50 w /10 k w parallel | 5 pf termination voltage -2.1 to +3.1 v (50 w selected) number of thresholds one per input threshold voltage range (into 50 w ) -2.10 to +5.10 v threshold resolution 5mv threshold accuracy \ 20mv \ 1% input sensitivity 200 mvpp minimum detectable pulsewidth 1 ns typ. at ecl levels
module descriptions each system consists of at least one clock module (e4805b) or clock and data generator module (e4831a), which generates the system clock and at least one 667 mhz generator/ anal yzer module (e4832a) or one 2.67 ghz generat or/anal yzer module (e4861a) which houses the fr ont- ends. the module e4831a is intend- ed for generator only systems. e4805b central clock module/e4831a clock and data generator module the e4805b and e4831a include a pll (phase-lock -loop) frequency generator to pro vide a system clock. depending on t he frequency chosen the data module e4841a can be clocked at a ratio of 1,2,4, or 16 times higher or lower t han the sys- tem clock. external start/stop: the e4805b can be started, stopped or gated on the selected active in put lev el. with the e4861a t here is only start mode. ext. clock/ext. reference: this input runs 81200 synchr onously with an ext. clock, or when a more accurate reference is needed t han the inter- nal oscillator. usage of a continuous clock is necessary. burst clock can- not be used as an external clock. maximum exter nal clock is 2.67 ghz. (note: no improvement of jitter specif ications will be achiev ed). guided deskew: individual semi-automatic deskew per channel. the deskew probe e4805b #003 allows deskew on the dut's (de vice under test) pins with the dut con- nect ed. deskew range is 20ns. figure 17: clock outputs for modules clock for expander frame e4848b clock/ref. input external input trigger output deskew probe e4805b central clock module interaction with external environment (instruments and duts) (only with the e4805b 667 mhz central clock module): the a gilent 81200 can react on user -def ined ev ents, which can result simply in a trigger pulse, for example, but also in a change of the pattern sequence, for details see t able 14. 16 table 21: e4805b central clock specifications frequency range (1) 1khz to 666.66700 mhz (can be entered as period or e4861a will run with clock module frequency) in range of 333 mhz to 2.67ghz, e4832a in range of 333 khz to 667 mhz. (2) resolution 1 hz accuracy \ 50 ppm with internal pll reference (1) may be limited by modules or front-ends (2) up to 667 mhz the resolution is 1 hz from 667 mhz to 1.3 gb/s the resolution is 2 hz from 1.3 gb/s the resolution is 4hz table 22: external input and ext.clock/ext.ref. input of e4805b zin/termination voltage 50 w /-2.10 v to 3.30 v sensitivity/max levels 400 mvpp /-3 v +6 v coupling ext. input: dc, -1.40 v to +3.70 v ext. clock/ext. ref ac input transitions/slope | 20 ns. ext. input active edge is selectable input frequency/period ext. clock 170 khz-2.67 ghz ext. ref 1*,2*,5, or 10 mhz required duty cycle 50 \ 10% latency(typical): to trigger output to channel output ext. input 16ns \ 1 clock** 46ns \ 1 clock** ext. clock 15ns 45ns ext.colck input multiplier 1,2....255 add 3ns if an expander frame is used *jitter performance may be degraded
17 table 25: event handling for e4805b usage on events description stop & go of data very useful for production tests during interaction with other test sequences: equipment data segment switching: based on the events. certain portions of the overall sequence can be executed trigger external devices: external instruments like an oscilloscope can be triggered, eg to sample a waveform or an error location. ate integration: the 81200 is started from an ate platform like an ic test system for complementing missing tester functionalities. the result: pass/fail information is returned back to the ate platform. match loop: repetition of a data segment as long as a defined event occurs. useful for device sychronization, e.g pll-based device. event trigger sources events can be defined as any combination of the following sources. a maximum of 10 events can be defined. e4805b option 003 8-line trigger input pod for ttl signals vxi trigger lines t0 and t1 any capture error/or no error detected by one of the analyzer channels software command control: an event trigger command issued locally or remotely. reactions to an event can be set per data segment immediately or deferred and can be any combina- tion of: data segment jump launch trigger pulse to the trigger output of the e4805b central clock module vxi trigger lines t0 and t1 can be set to 01, 10 or 11 table 23: trigger output characteristics e4805b trigger output signals clock mode or sequence mode (up to 667 mhz). in sequence mode the pulse can be set to mark the start of any segment output impedance 50 w output level ttl (frequency | 180 mhz), 1 v to gnd, ecl 50 to gnd/-2 v, pecl 50 w to +3v trigger advance 30 ns typ. between trigger output and data output/sampling point (delay set to zero in both cases) maximum input voltage -2 v to +3.3 v jitter (int.reference/int. | 10 ps rms (typ. 5ps) clock, measured at trigger output). table 24: e4805b sequencing number of segments 1 to 30 (every segment looped once) 1 to 60 (no segment looped) looping levels up to 4 nested loops plus one optional infinite loop loops can be set independently from 1 to 2 20 repetitions start/stop external input, manual, programmed event handling react on internal and external events. details see table 13
18 mainframes: see t able 34. save/recall: pattern segments, settings and com plete settings plus segments can be saved and recalled. the number of settings that can be st ored is limited only by internal disk space. vector import/export: pattern files can be import ed/exported via a 3.5 inch f loppy disk, lan or gp- ib (ieee 488.2). f ile format is ascii using a stil subset. programming interface: gp-ib (ieee 488.2) and lan. the interface to applications such as c, visual basic, or vee must be inst alled. agilent 81200 plug & play drivers for easy prog ramming are a vail- able. programming language: scpi 1992.0 programming times: vector transfer from memory to har dware depends on the amount of data. also see table 26. on-line help: cont ext-sensitive. general characteristics print-on-demand: getting started and prog ramming guides can be printed from .pdf f iles included in the 81200 sof tware. self-test: module and system self- tests can be initiated. modules module size: vxi c-size, 1 slot. module type: register -based; requires 81200 user sof tware e4873a supplied with the main- frames. weight: (including fr ont-ends) net: 2kg. shipping: 2.5 kg. re-calibration period: 3 years recommended. agilent technologies quality standards the 81200 is pr oduced to the iso 9001 inter national quality system standard as part of agilent t echnologies commitment to continually increase customer satisfaction thr ough improved quality control. table 26: programming times of the 81200 programming time change of levels 6 ms typ. change of delay 16 ms.typ. not applicable in run mode. change of period 60 mstyp. for one e4805b with one e4832a. not applicable in run mode. increases with the number of modules but less than proportional. stop + start 32 ms typ download values: system with 4 channels, <1.5 s typ 100,000 bit each system with 120 channels, < 30 s typ 1mbit each system with 40 channels, < 10 s typ 1 mbit each
19 table 27: general mainframe characteristics e4849c mainframe e4848b expander frame factory-installed items e8403a 13-slot vxi c-size frame, e8403a 13-slot vxi c-size frame, e1482b vxi bus extender module, out of the controller options: 1 meter mxi and intx cable #012 vxi 2-slot pc e9851a with additional 64 mb memory (total 128 mb) with windows nt 4.0, e4873a agilent 81200 usersoftware installed #013 ieee 1394 pc link to vxi (e8491b) with installation license & cd-rom of e4873a 81200 user software number of slots for 11(for controller option 012) 81200 modules 12(for controller option 013) (subtract 1 if expander frame is connected) operating temperature 10c to 40c storage temperature -20c to 60c humidity 80% rel. humidity at 40c power requirements 90-264 vac, \ 10%, 44-66 hz 90-264 vac, \ 10%, 300-440 hz (not recommended, leakage current may exceed safety limits at } 132 vac) power available for modules 950 w for 90-110 vac supplies 1000 w for 110-264 vac supplies electromagnetic compatibility en 55011/cispr 11 group 1, class a + 21 db acoustic noise 48 (56) dba sound pressure at low (high) fan speed safety iec 348, ul 1244, csa 22.2 #231, ce-mark physical dimensions w:424.5mm h:352 mm d: 631 mm weight (net) 26.8 kg 25.3kg weight (shipping max.) 72 kg 67 kg
20 table 28: dc volts +24v +12v +5v -2v -5.2v -12v modules (these specifications take already the power specifications of the front-ends into account) e4805 dc current 0.15a 0.2a 1.8a 1.4a 3.8a 0.2a central clock dynamic current 0.015a 0.02a 0.18a 0.14a 0.38a 0.02a module e4861a 2.67 gb/s dc current 0.10a 0.50a 5.20a 1.80a 4.00a 0.90a gen./an. module dynamic current 0.01a 0.05a 0.52a 0.18a 0.40a 0.09a note: for the module e4841a and e4832a the power specifications of the chosen front-ends e4846a, e4847a, e4835a or e4838a have to be added to the power specifications of the e4841a and e4832a module to get the overall value of the power specifications e4841a dc current 0.03 2.90a 0.85a 4.20a 0.04a 667 mhz dynamic current 0.003a 0.290a 0.085a 0.420a 0.004a gen./an. module e4832a dc current 0.10a 0.10a 2.60a 0.60a 3.60a 0.10a 667 mhz dynamic current 0.010a 0.01a 0.26a 0.06a 0.36a 0.01a gen./an. module front-ends e4835a dc current 0.2a 1.2a 0.2a 0.3a 0.3a two differential dynamic current 0.02a 0.12a 0.02a 0.03a 0.03a analyzer 667 msa/s e4838a dc current 0.45 0.18 0.07 0.38 0.41 differential dynamic current 0.045 0.018 0.007 0.038 0.041 generator 667 mhz, var. slopes e4846a dc current 0.210a 0.025a 0.050a 0.120a 0.300a 200 mbit/s dynamic current 0.021a 0.003a 0.005a 0.0120a 0.030a dual generator e4847a dc current 0.1a 0.9a 0.06a 0.05a 0.06a 333 msa/s dynamic current 0.01a 0.09a 0.006a 0.005a 0.006a dual analyzer
21 table 29: cooling requirements for the modules e4805b and e4861a with the front-ends installed modules d d p mm h 2 o for air flow 10 c rise liter/s e4850b 0.25 3.6 e4861a 0.4 5.2 table 30: cooling requirements for the module e4841a with the front-ends installed module d d p mm h 2 o for air flow 15c rise liter/s e4841a 0.3 4.5 e4832a 0.3 3.7
related literature pub. number agilent 81200 data generat or/anal yzer platform, 5980-0488e brochure agilent 81200 data generat or/anal yzer platform 5965-3417e conf iguration guide agilent e4839a t est fixture 5968-3580e how to transfer data betw een design, simulation 5968-6276e and the a gilent 81200 data generator anal yzer flat panel display link test 5968-8028e how to use the a gilent data generat or/analyzer 5968-3857e platform together with vee for signal integ rity analysis agilent 81200 data generat or/anal yzer platform, 5980-2640e start up assist ance www.agilent.com/find/81200_overview b y internet, phone, or fax, get assistance with all your test & measurement needs online assistance: www.agilent.com/find/assist phone or fax united states: (tel) 800 829 4444 canada: (tel) 877 894 4414 (fax) 905 282 6495 china: (tel) 800 810 0189 (fax) 800 820 2816 europe: (tel) (31 20) 547 2323 (fax) (31 20) 547 2390 japan: (tel) (81) 426 56 7832 (fax) (81) 426 56 7840 korea: (tel) (82 2) 2004 5004 (fax) (82 2) 2004 5115 latin america: (tel) (650) 752 5000 taiwan: (tel) 0800 047 866 (fax) 0800 286 331 other asia pacific countries: (tel) (65) 6375 8100 (fax) (65) 6836 0252 email: tm_asia@agilent.com product specifications and descriptions in this document subject to change without notice. ? agilent technologies, inc. 2004 printed in the netherlands, 29th april 2004 5965-3415e agilent technologies' test and measurement support, services, and assistance agilent t echnologies aims to maximize the value you receive, while minimiz- ing your risk and pr oblems. we strive to ensure that you get the t est and measurement capabilities you paid for and obtain the support you need. our extensive support resour ces and services can help you choose the right agilent products for your applications and apply t hem successfully. every instr ument and system we sell has a g lobal war ranty. support is available for at least five y ears bey ond the pr oduction life of the product. tw o concepts underlie agilent's overall support policy: "our promise" and "y our a dvantage." our promise our promise means y our a gilent test and measurement equipment will meet its advertised perfor mance and functionality. when y ou are choosing new equipment, we will help you with pr oduct information, including realistic per- formance specifications and practical recommendations from experienced test engineers. when you use a gilent equipment, we can v erify t hat it works properly, help with pr oduct operation, and pro vide basic measurement assis- tance for the use of specif ied capabilities, at no extra cost upon request. many self-help tools are a vailable. your advantage your a dvant age means t hat a gilent off ers a wide range of additional expert test and measurement services, which you can pur chase accor ding to your unique technical and business needs. solve problems efficiently and gain a competitive edge by contracting with us for calibration, extra-cost upg rades, out-of-war ranty repairs, and onsite education and training, as well as design, system integ ration, project management, and ot her prof essional engineering services. experienced a gilent engineers and technicians w orldwide can help you maximize your pr oductivity, optimize the return on inv estment of your agilent instr uments and syst ems, and obtain dependable measurement accura- cy for the life of those pr oducts. www.agilent.com/find/emailupdates get the latest information on the products and applications you select.

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